1. Technical Field
The present invention relates in general to designing and simulating digital devices, modules and systems in a distributed simulation environment. In particular, the present invention relates to a method and system that improve a distributed simulation environment to allow for efficient monitoring and utilization of instrumentation events embedded with a simulation model. More particularly, the present invention relates to a method and system for tracking instances of a testcase execution event within a hardware description language (HDL) model using a simulation control program.
2. Description of the Related Art
Verifying the logical correctness of a digital design and debugging the design, if necessary, are very important steps in most digital design processes. Logic networks are tested either by actually building networks or by simulating networks on a computer. As logic networks become highly complex, it becomes necessary to simulate a design before the design is actually built. This is especially true when the design is implemented as an integrated circuit, since the fabrication of integrated circuits requires considerable time and correction of mistakes is quite costly. The goal of digital design simulation is the verification of the logical correctness of the design.
In a typical automated design process that is supported by a conventional electronic computer-aided design (ECAD) system, a designer enters a high-level description utilizing a hardware description language (HDL), such as VHDL, producing a representation of the various circuit blocks and their interconnections. The ECAD system compiles the design description into a format that is best suited for simulation. A simulator is then utilized to verify the logical correctness of the design prior to developing a circuit layout.
A simulator is typically a software tool that operates on a digital representation, or simulation model of a circuit, and a list of input stimuli representing inputs of the digital system. A simulator generates a numerical representation of the response of the circuit which may then either be viewed on the display screen as a list of values or further interpreted, often by a separate software program, and presented on the display screen in graphical form. The simulator may be run either on a general purpose computer or on another piece of electronic apparatus, typically attached to a general purpose computer, specially designed for simulation. Simulators that run entirely in software on a general purpose computer will hereinafter be referred to as “software simulators”. Simulators that are run with the assistance of specially designed electronic apparatus will hereinafter be referred to as “hardware simulators”.
Usually, software simulators perform a very large number of calculations and operate slowly from the user's point of view. In order to optimize performance, the format of the simulation model is designed for very efficient use by the simulator. Hardware simulators, by nature, require that the simulation model comprising the circuit description be communicated in a specially designed format. In either case, a translation from an HDL description to a simulation format, hereinafter referred to as a simulation executable model, is required.
It is often the case that complex instrumentation events occur over many cycles and are composed of temporally complex interactions of a large number of signals within the given simulation model. Detecting such instrumentation events typically requires a complex functionality that necessitates a correspondingly complex modeling data structure. In such a circumstance, using HDL code or unconventional comments to create the necessary instrumentation logic can be difficult and inefficient.
In general, the instrumentation functionality required to detect such complex instrumentation events is usually more effectively created utilizing a high-level programming language such as C or C++. High-level programming languages typically provide more direct support for complex data structures and provide features such as dynamic memory allocation, among others, that allow for the more efficient generation of functionality suited to the detection of complex instrumentation events. Furthermore, simulation engineers are often not primarily conversant in HDLs, but instead rely on high-level programming languages such as C or C++.
It would therefore be advantageous to provide a means by which to generate and process instrumentation events, hereafter referred to as RTX instrumentation events, under RTX control utilizing a high-level language such as C or C++. Such a means would enable simulation engineers to more efficiently generate complex instrumentation events with the additional flexibility inherent in high-level programming languages. It would be further advantageous to provide a means for detecting RTX instrumentation events associated with an HDL design entity that is replicated as multiple instantiations within a simulation model.